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Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
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Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
1949
17.5.42
FLR Capability ID (FLRCID)—Offset B0h
Access Method
Default: 0000h
17.5.43
FLR Control (FLRCTL)—Offset B4h
This register shall be read-only 0 when SATAGC.FLRCSSEL=1.
Access Method
Default: 0000h
17.5.44
Scratch Pad (SP)—Offset D0h
Access Method
Default: 00000000h
Type: 
PCI Configuration Register
(Size: 16 bits)
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NEX
T
CID
Bit 
Range
Default & 
Access
Description
15:8
00h
RO
Next Capability (NEXT): 
00h indicating the final item in the Capability List.
7:0
00h
RO
Capability ID (CID): 
The value of this field depends on the FLRCSSEL bit. 
SATAGC.FLRCSSEL = 0, Capability ID = 13h; SATAGC.FLRCSSEL = 1, Capability ID = 
00h (capability is bypassed).
Type: 
PCI Configuration Register
(Size: 16 bits)
FLRCTL: 
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RS
VD
Bit 
Range
Default & 
Access
Description
15:0
0h
RO
RSVD: 
Reserved
Type: 
PCI Configuration Register
(Size: 32 bits)
SP: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DT