Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2076
Datasheet
17.19.10 PCS_DWORD9 (pcs_dword9)—Offset 24h
Access Method
Default: 00000000h
3:0
4h
RW
cri_rxeb_lowater_3_0:
Elastic buffer low watermark based on which SKP is added
Bit
Range
Default &
Access
Description
Type:
Message Bus Register
(Size: 32 bits)
pcs_dword9:
Op Codes:
0h - Read, 1h - Write
0h - Read, 1h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
se
rv
ed
502
reg_s
tr
apgro
up_4_0
reg_powe
rd
own_1_0
re
g_pc
s_tx
cm
nk
ee
pd
isabl
e_o
vrd
reg_st
ra
plan
e_5_0
re
g_tx1_powerdo
w
n
_o
ve
rr
ide
re
g_tx2_powerdo
w
n
_o
ve
rr
ide
re
g_tx
da
tav
alid
re
g_tx
dee
m
p_1_0
reg_t
xm
argin_2_0
re
g_txswing
re
g_
txen
ab
le
reg_txterm_vcc_1_0
re
g_tx
detrxlpbk
re
g_tx
ele
ctidle
re
g_tx
com
p
liance
re
g_tx
one
sz
er
oe
s
reg_latenc
yo
pt
im
_1_0
Bit
Range
Default &
Access
Description
31
0h
RW
reserved502:
reserved
30:26
0h
RW
reg_strapgroup_4_0:
Override for i_strapgroup
25:24
0h
RW
reg_powerdown_1_0:
Override for i_powerdown
23
0h
RW
reg_pcs_txcmnkeepdisable_ovrd:
Override for ipcs_txcmnkeepdisable input 0: Use
value on ipcs_txcmnkeepdisable input pin to determine o_txgohighz state in P2/
slumber 1: Force pcs_txcmnkeepdisable to 0
22:18
0h
RW
reg_straplane_5_0:
Override for i_straplane
17
0h
RW
reg_tx1_powerdown_override:
Overrides i_powerdown[1:0] indication from MAC
for Tx1 1 : selects reg_powerdown[1:0] 0 : selects i_powerdown[1:0]
16
0h
RW
reg_tx2_powerdown_override:
Overrides i_powerdown[1:0] indication from MAC
for Tx2 1 : selects reg_powerdown[1:0] 0 : selects i_powerdown[1:0]
15
0h
RW
reg_txdatavalid:
Override for i_txdatavalid (register is NOT used)
14:13
0h
RW
reg_txdeemp_1_0:
Override for i_txdeemph