Intel E3815 FH8065301567411 Data Sheet

Intel

Product codes

FH8065301567411

Intel

®

Atom™ Processor E3800 Product Family

Datasheet

2165

2068–206Bh

4

“Event Ring Segment Table Size 3 (ERSTSZ3)—Offset 2068h” on

00000000h

2070–2073h

4

“Event Ring Segment Table Base Address Low 3 (ERSTBA_LO3)—

Offset 2070h” on page 2224

00000000h

2074–2077h

4

“Event Ring Segment Table Base Address High 3 (ERSTBA_HI3)—

Offset 2074h” on page 2224

00000000h

2078–207Bh

4

“Event Ring Dequeue Pointer Low 3 (ERDP_LO3)—Offset 2078h” on

00000000h

207C–207Fh

4

“Event Ring Dequeue Pointer High 3 (ERDP_HI3)—Offset 207Ch” on

00000000h

2080–2083h

4

“Interrupter 4 Management (IMAN4)—Offset 2080h” on page 2226

00000000h

2084–2087h

4

“Interrupter 4 Moderation (IMOD4)—Offset 2084h” on page 2227

00000FA0h

2088–208Bh

4

“Event Ring Segment Table Size 4 (ERSTSZ4)—Offset 2088h” on

00000000h

2090–2093h

4

“Event Ring Segment Table Base Address Low 4 (ERSTBA_LO4)—

Offset 2090h” on page 2228

00000000h

2094–2097h

4

“Event Ring Segment Table Base Address High 4 (ERSTBA_HI4)—

Offset 2094h” on page 2229

00000000h

2098–209Bh

4

“Event Ring Dequeue Pointer Low 4 (ERDP_LO4)—Offset 2098h” on

00000000h

209C–209Fh

4

“Event Ring Dequeue Pointer High 4 (ERDP_HI4)—Offset 209Ch” on

00000000h

20A0–20A3h

4

“Interrupter 5 Management (IMAN5)—Offset 20A0h” on page 2230

00000000h

20A4–20A7h

4

“Interrupter 5 Moderation (IMOD5)—Offset 20A4h” on page 2231

00000FA0h

20A8–20ABh

4

“Event Ring Segment Table Size 5 (ERSTSZ5)—Offset 20A8h” on

00000000h

20B0–20B3h

4

“Event Ring Segment Table Base Address Low 5 (ERSTBA_LO5)—

Offset 20B0h” on page 2232

00000000h

20B4–20B7h

4

“Event Ring Segment Table Base Address High 5 (ERSTBA_HI5)—

Offset 20B4h” on page 2233

00000000h

20B8–20BBh

4

“Event Ring Dequeue Pointer Low 5 (ERDP_LO5)—Offset 20B8h” on

00000000h

20BC–20BFh

4

“Event Ring Dequeue Pointer High 5 (ERDP_HI5)—Offset 20BCh” on

00000000h

20C0–20C3h

4

“Interrupter 6 Management (IMAN6)—Offset 20C0h” on page 2235

00000000h

20C4–20C7h

4

“Interrupter 6 Moderation (IMOD6)—Offset 20C4h” on page 2235

00000FA0h

20C8–20CBh

4

“Event Ring Segment Table Size 6 (ERSTSZ6)—Offset 20C8h” on

00000000h

20D0–20D3h

4

“Event Ring Segment Table Base Address Low 6 (ERSTBA_LO6)—

Offset 20D0h” on page 2237

00000000h

20D4–20D7h

4

“Event Ring Segment Table Base Address High 6 (ERSTBA_HI6)—

Offset 20D4h” on page 2237

00000000h

20D8–20DBh

4

“Event Ring Dequeue Pointer Low 6 (ERDP_LO6)—Offset 20D8h” on

00000000h

20DC–20DFh

4

“Event Ring Dequeue Pointer High 6 (ERDP_HI6)—Offset 20DCh” on

00000000h

20E0–20E3h

4

“Interrupter 7 Management (IMAN7)—Offset 20E0h” on page 2239

00000000h

Table 211.

Summary of USB xHCI Memory Mapped I/O Registers—MBAR (Continued)

Offset

Size

(Bytes)

Register Name (Register Symbol)

Default Value