Intel E3815 FH8065301567411 Data Sheet

Intel

Product codes

FH8065301567411

Intel

®

Atom™ Processor E3800 Product Family

2166

Datasheet

20E4–20E7h

4

“Interrupter 7 Moderation (IMOD7)—Offset 20E4h” on page 2240

00000FA0h

20E8–20EBh

4

“Event Ring Segment Table Size 7 (ERSTSZ7)—Offset 20E8h” on

00000000h

20F0–20F3h

4

“Event Ring Segment Table Base Address Low 7 (ERSTBA_LO7)—

Offset 20F0h” on page 2241

00000000h

20F4–20F7h

4

“Event Ring Segment Table Base Address High 7 (ERSTBA_HI7)—

Offset 20F4h” on page 2242

00000000h

20F8–20FBh

4

“Event Ring Dequeue Pointer Low 7 (ERDP_LO7)—Offset 20F8h” on

00000000h

20FC–20FFh

4

“Event Ring Dequeue Pointer High 7 (ERDP_HI7)—Offset 20FCh” on

00000000h

2100–2103h

4

“Interrupter 8 Management (IMAN8)—Offset 2100h” on page 2243

00000000h

2104–2107h

4

“Interrupter 8 Moderation (IMOD8)—Offset 2104h” on page 2244

00000FA0h

2108–210Bh

4

“Event Ring Segment Table Size 8 (ERSTSZ8)—Offset 2108h” on

00000000h

2110–2113h

4

“Event Ring Segment Table Base Address Low 8 (ERSTBA_LO8)—

Offset 2110h” on page 2245

00000000h

2114–2117h

4

“Event Ring Segment Table Base Address High 8 (ERSTBA_HI8)—

Offset 2114h” on page 2246

00000000h

2118–211Bh

4

“Event Ring Dequeue Pointer Low 8 (ERDP_LO8)—Offset 2118h” on

00000000h

211C–211Fh

4

“Event Ring Dequeue Pointer High 8 (ERDP_HI8)—Offset 211Ch” on

00000000h

3000–3003h

4

“Door Bell 1 (DOORBELL1)—Offset 3000h” on page 2248

00000000h

3004–3007h

4

“Door Bell 2 (DOORBELL2)—Offset 3004h” on page 2249

00000000h

3008–300Bh

4

“Door Bell 3 (DOORBELL3)—Offset 3008h” on page 2250

00000000h

300C–300Fh

4

“Door Bell 4 (DOORBELL4)—Offset 300Ch” on page 2250

00000000h

3010–3013h

4

“Door Bell 5 (DOORBELL5)—Offset 3010h” on page 2251

00000000h

3014–3017h

4

“Door Bell 6 (DOORBELL6)—Offset 3014h” on page 2251

00000000h

3018–301Bh

4

“Door Bell 7 (DOORBELL7)—Offset 3018h” on page 2252

00000000h

301C–301Fh

4

“Door Bell 8 (DOORBELL8)—Offset 301Ch” on page 2252

00000000h

3020–3023h

4

“Door Bell 9 (DOORBELL9)—Offset 3020h” on page 2253

00000000h

3024–3027h

4

“Door Bell 10 (DOORBELL10)—Offset 3024h” on page 2254

00000000h

3028–302Bh

4

“Door Bell 11 (DOORBELL11)—Offset 3028h” on page 2254

00000000h

302C–302Fh

4

“Door Bell 12 (DOORBELL12)—Offset 302Ch” on page 2255

00000000h

3030–3033h

4

“Door Bell 13 (DOORBELL13)—Offset 3030h” on page 2255

00000000h

3034–3037h

4

“Door Bell 14 (DOORBELL14)—Offset 3034h” on page 2256

00000000h

3038–303Bh

4

“Door Bell 15 (DOORBELL15)—Offset 3038h” on page 2256

00000000h

303C–303Fh

4

“Door Bell 16 (DOORBELL16)—Offset 303Ch” on page 2257

00000000h

3040–3043h

4

“Door Bell 17 (DOORBELL17)—Offset 3040h” on page 2258

00000000h

3044–3047h

4

“Door Bell 18 (DOORBELL18)—Offset 3044h” on page 2258

00000000h

3048–304Bh

4

“Door Bell 19 (DOORBELL19)—Offset 3048h” on page 2259

00000000h

304C–304Fh

4

“Door Bell 20 (DOORBELL20)—Offset 304Ch” on page 2259

00000000h

Table 211.

Summary of USB xHCI Memory Mapped I/O Registers—MBAR (Continued)

Offset

Size

(Bytes)

Register Name (Register Symbol)

Default Value