Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2283
18.7.150 AUX Reset Control (AUX_CTRL_REG)—Offset 80C0h
Access Method
Default: 015FC0F0h
Bit
Range
Default &
Access
Field Name (ID): Description
31:20
000h
RO
RESERVED (RSVD):
Reserved.
Power Well:
Core
19
0b
RW
Enable PCIe PHY Regulator Power Down (EN_PP_REG_PDWN):
•
•
0 = Disable PCIe PHY regulator power down mode
•
1 = Enable PCIe PHY regulator power down mode
Power Well:
Core
18:17
0h
RW
Reserved (RESERVED):
Reserved
Power Well:
Core
16
0b
RW
Enable USB PHY p2_EN (EN_USB_PP2_EN):
•
•
0 = Disable USB PHY P2_EN
•
1 = Enable USB PHY P2_EN
Power Well:
Core
15
0b
RW
Enable USB3 Port Clock Gate (EN_U3P_CG):
•
•
0 = Disable USB3 port clock gate
•
1 = Enable USB3 port clock gate
Power Well:
Core
14
0b
RW
Enable P3 Override P2 RxDetect (EN_P3_OVR_P2_RD):
•
•
0 = Disable P3 overriding P2 in RxDetect
•
1 = Enable P3 overriding P2 in RxDetect
Power Well:
Core
13
1b
RW
Enable USB PHY Pipe Reset Exit P3 (EN_UPP_RST_EP3):
•
•
0 = Disable a USB PHY pipe reset when exit P3
•
1 = Enable a USB PHY pipe reset when exit P3
Power Well:
Core
12:0
1C0Fh
RO
RESERVED (RSVD_1):
Reserved.
Power Well:
Core
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h