Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

2293

13

1b

RW

When set to 1 enables a filter function to 

TX electrical idle signal at PCie PIPE. We have a filter that will set TXelecidle signal of 

PCIe PIPE to 1 whenever we are in isolation state or power down transition states.

SUS

12

1b

RW

This is a global switch to 

enable or not enable the host engine to generate a PME message.

SUS

11

1b

RW

When set to '1' enable isolation

SUS

10

1b

RW

Set 1 to enable a new feature. 

This new feature is designed to use L1 as a state to identify whether we should do P2 

Overwrite or not. We used to use P1 state to identify whether or not to invoke P2 

overwrite function.

SUS

9

0b

RW

When set to '1' enable core clock gating 

based on low power state entered

SUS

8

0b

RW

When set to '1' enable PHY status 

timeout function which is designed to cover the PCIePHY issue that we may have not 

able to detect the PHY status toggle.

SUS

7

1b

RW

When set to '1' ignore the 

aux_pm_en reg from PCIe core to continue the remote wake/clock switching support

SUS

6

0b

RW

When set to '1' enable P2 overwrite P1 

when PCIe core has indicated the transition from P0 to P1. This is to enable entering the 

even lower power state.

SUS

5

1b

RW

When set 1 '1' enable the remote 

wake function by allowing P2 clock/switching and P2 entering

SUS

4:1

0h

RW

Reserved.

SUS

0

0b

RW

When set to '1' force PM state to go to the 

state indicated in bit 4:1

SUS