Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2298
Datasheet
31
28
24
20
16
12
8
4
0
0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0
FSLS_SE
0_DIS_DE
L_7_0
RSVD
EN_
D
E
T
EC
T_
N
O
M
IN
A
L_
PK
T
_
E
O
P
DIS_C
H
IRP
_
RES
PONSE
D
IS_192B_LIM
EXT_FS
LS_DIS
UTMI_RST
_SEL
DIS_H
S
_
D
IS_WIN
DIS
_
P
E
RR_DET
D
IS_P
F_IOU
T
DRV_RES
K
_FSLS
_
SER
E
N
_U2_DROP_PING
EN_U2_FORCE_PING
E
N
_U
2_AUT
O_PING
DI
S_P
H
Y
_
SU
SM
UTMI_INT_C
G_DIS
DIS_PSUSM_DS
FORCE_PHY_RST
U2_A
CC_
SIM_
TIM
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
31h
RW
FS/LS Mode SE0 Disconnect Delay[7:0] (FSLS_SE0_DIS_DEL_7_0):
# of
microseconds of SE0 in FS/LS mode to register disconnect had occurred.
Power Well:
SUS
23:18
00h
RW
Reserved (RSVD):
Reserved.
Power Well:
SUS
17
0b
RW
EN_DETECT_NOMINAL_PKT_EOP:
•
•
0 = Detect minimal packet EOP.
•
1 = Detect nominal packet EOP.
Power Well:
SUS
16
0b
RW
Disable Chirp Response (DIS_CHIRP_RESPONSE):
•
•
0 = Normal
•
1 = Force full speed on host ports (disable chirp response)
Power Well:
SUS
15
0b
RW
Disable 192 Byte Limit Check (DIS_192B_LIM):
•
•
0 = Enforce 192 byte limit on complete-split INs. Treat any packet ) 192 as babble
case.
•
1 = Disable 192 byte limit check.
Power Well:
SUS
14
0b
RW
External Provided FS/LS Disconnect (EXT_FSLS_DIS):
•
•
0 = Internal FS/LS Disconnect from linestate(1:0)
•
1 = External provided FS/LS Disconnect from hostdisconnect input
Power Well:
SUS
13:12
0h
RW
UTMI Reset Source Select (UTMI_RST_SEL):
Select UTMI Reset Source (FRD UTMI
Reset Only)
•
•
00 = HCReset or Force PHY Reset or internal reset after disconnect/suspend for
restart (default)
•
01,11 = UTMI reset = ~UTMI suspendm
•
10 = UTMI reset = ~UTMI suspendm and synchronization to port clk.
Power Well:
SUS