Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2306
Datasheet
18.7.170 USB2 Protocol Gap Timer
(USB2_PROTOCOL_GAP_TIMER_REG)—Offset 8134h
Access Method
Default: 000C3C640C05140Ch
15:14
0h
RO
Port 8 UTMI Linestate (P8_UTMI_LS):
Reserved.
Power Well:
Core
13:12
0h
RO
Port 7 UTMI Linestate (P7_UTMI_LS):
Reserved.
Power Well:
Core
11:10
0h
RO
Port 6 UTMI Linestate (P6_UTMI_LS):
Reserved.
Power Well:
Core
9:8
0h
RO
Port 5 UTMI Linestate (P5_UTMI_LS):
Reserved.
Power Well:
Core
7:6
0h
RO
Port 4 UTMI Linestate (P4_UTMI_LS):
Reserved.
Power Well:
Core
5:4
0h
RO
Port 3 UTMI Linestate (P3_UTMI_LS):
Reserved.
Power Well:
Core
3:2
0h
RO
Port 2 UTMI Linestate (P2_UTMI_LS):
Reserved.
Power Well:
Core
1:0
0h
RO
Port 1 UTMI Linestate (P1_UTMI_LS):
Reserved.
Power Well:
Core
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 64 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 1 1 0 0
RSV
D
LS
TX
_G
AP_
T
IM
E
LS
RX
_G
AP_
T
IM
E
LS
_G
AP_
T
IM
E
FS
_G
AP_
T
IM
E
HS
RX
_G
AP_
T
IM
E
HST
X
SOF
_
G
A
P_
TIM
E
HS
TX
_G
AP_
T
IM
E