Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2307
18.7.171 USB2 Protocol Bus Timeout Timer
(USB2_PROTOCOL_BTO_TIMER_REG)—Offset 813Ch
Access Method
Default: 8D4258B8h
Bit
Range
Default &
Access
Field Name (ID): Description
63:56
00h
RO
Reserved (RSVD):
Reserved.
Power Well:
Core
55:48
0ch
RW
GAP time after LS TX thru FS hub (LSTX_GAP_TIME):
Reserved.
Power Well:
Core
47:40
3ch
RW
GAP time after LS RX thru FS hub (LSRX_GAP_TIME):
Reserved.
Power Well:
Core
39:32
64h
RW
GAP timer after LS (LS_GAP_TIME):
Reserved.
Power Well:
Core
31:24
0ch
RW
GAP time after FS (FS_GAP_TIME):
Reserved.
Power Well:
Core
23:16
05h
RW
GAP time after HS RX (HSRX_GAP_TIME):
Reserved.
Power Well:
Core
15:8
14h
RW
GAP time after HS TX SOF (HSTXSOF_GAP_TIME):
Reserved.
Power Well:
Core
7:0
0ch
RW
GAP time HS TX Packet (HSTX_GAP_TIME):
Reserved.
Power Well:
Core
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
1 0 0 0 1 1 0 1 0 1 0 0 0 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 0 0
LS_BUS_T
O
FS_BUS_T
O
HS_BUS_T
O
Bit
Range
Default &
Access
Field Name (ID): Description
31:21
46ah
RW
Bus timeout count for LS (LS_BUS_TO):
Reserved.
Power Well:
Core