Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2422
Datasheet
18.9.21 USB PIDs Register (DP_USB_PIDs)—Offset A4h
Access Method
Default: 00000000h
3:0
0000b
RW
DATA_LEN_CNT (DATALENCNT_0): This field is used to indicate the size
of the data to be transferred. Reset default = 0h. For write operations, this
field is set by software to indicate to the hardware how many bytes of data in
Data Buffer are to be transferred to the console. A value of 0h indicates that
a zero-length packet should be sent. A value of 1-8 indicates 1-8 bytes are to
be transferred. Values 9-Fh are illegal and how hardware behaves if used is
undefined. For read operations, this field is set by hardware to indicate to
software how many bytes in Data Buffer are valid in response to a read
operation. A value of 0h indicates that a zero length packet was returned and
the state of Data Buffer is not defined. A value of 1-8 indicates 1-8 bytes
were received. Hardware is not allowed to return values 9-Fh. The
transferring of data always starts with byte 0 in the data area and moves
toward byte 7 until the transfer size is reached.
of the data to be transferred. Reset default = 0h. For write operations, this
field is set by software to indicate to the hardware how many bytes of data in
Data Buffer are to be transferred to the console. A value of 0h indicates that
a zero-length packet should be sent. A value of 1-8 indicates 1-8 bytes are to
be transferred. Values 9-Fh are illegal and how hardware behaves if used is
undefined. For read operations, this field is set by hardware to indicate to
software how many bytes in Data Buffer are valid in response to a read
operation. A value of 0h indicates that a zero length packet was returned and
the state of Data Buffer is not defined. A value of 1-8 indicates 1-8 bytes
were received. Hardware is not allowed to return values 9-Fh. The
transferring of data always starts with byte 0 in the data area and moves
toward byte 7 until the transfer size is reached.
Power Well: Core
Bit
Range
Default
& Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 32 bits)
MBAR Reference:
[B:0, D:29, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
RECEIVED
_PID
_STS_0
SEND
_PID_CNT_0
TO
K
E
N
_
PI
D
_
C
N
T
_
0
Bit
Range
Default
& Access
Field Name (ID): Description
31:24
00h
RO
Reserved (RSVD): Reserved.