Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2721
20.6.25
RIRBWP—Offset 58h
RIRB Write Pointer
Access Method
Default: 0000h
Type:
Memory Mapped I/O Register
(Size: 16 bits)
RIRBWP:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RIRB_WRITE
_P
O
INTER_RE
S
ET
RESE
RVED
0
RIRB_W
RIT
E
_POINTE
R
Bit
Range
Default &
Access
Description
15
0h
WO
RIRB_WRITE_POINTER_RESET:
Software writes a 1 to this bit to reset the RIRB
Write Pointer to 0 s. The RIRB DMA engine must be stopped prior to resetting the Write
Pointer or else DMA transfer may be corrupted. This bit will always be read as 0.
14:8
00h
RO
RESERVED0:
reserved
7:0
00h
RO
RIRB_WRITE_POINTER:
Indicates the last valid RIRB entry written by the DMA
controller. Software reads this field to determine how many responses it can read from
the RIRB. The value read indicates the RIRB Write Pointer offset in 2 Dword RIRB entry
units since each RIRB entry is 2 Dwords long . Supports up to 256 RIRB entries 256 x 8B
2KB . This field may be read while the DMA engine is running.