Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2722
Datasheet
20.6.26
RINTCNT—Offset 5Ah
Response Interrupt Count
Access Method
Default: 0000h
Type: 
Memory Mapped I/O Register
(Size: 16 bits)
RINTCNT: 
AZLBAR Type: 
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference: 
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RESE
RVED
0
N_RESPONSE_
INT
ERRUPT_C
OU
NT
Bit 
Range
Default & 
Access
Description
15:8
00h
RO
RESERVED0: 
reserved
7:0
00h
RW
N_RESPONSE_INTERRUPT_COUNT: 
0000_0001b 1 Response sent to RIRB 
1111_1111b 255 Responses sent to RIRB 0000_0000b 256 Responses sent to RIRB The 
DMA engine should be stopped when changing this field or else an interrupt may be lost. 
Note that each Response occupies 2 Dwords in the RIRB. This is compared to the total 
number of responses that have been returned as opposed to the number of frames in 
which there were responses. If more than one codec responds in one frame then the 
count is increased by the number of responses received in the frame.