Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
371
13.6.21
TTR0—Offset 81h
Rank 0 Bandwidth Trip Thresholds
Access Method
Default: 00000000h
13.6.22
TTR1—Offset 82h
Rank 1 Bandwidth Trip Thresholds
Access Method
Default: 00000000h
Type: 
Message Bus Register
(Size: 32 bits)
Offset: 
Op Codes:
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RESE
RVE
D
_1
WR_T
HRE
S
HO
LD
RD
_T
HRE
S
HO
LD
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:16
0h
RO
RESERVED_1: 
Reserved
15:8
0h
RW
WR_THRESHOLD: 
Write Threshhold (W): Indicates (in absence of a thermal sensor) a 
threshold to initiate a trip for the throttle mechanism. This value will be compared 
against the total Rank0 Write count from the event counters when there is no external 
thermal sensor configured for DRAM protection.
7:0
0h
RW
RD_THRESHOLD: 
Read Threshhold (R): Indicates (in absence of a thermal sensor) a 
threshold to initiate a trip for the throttle mechanism. This value will be compared 
against the total Rank0 Read count from the event counters when there is no external 
thermal sensor configured for DRAM protection
Type: 
Message Bus Register
(Size: 32 bits)
Offset: 
Op Codes:
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SERV
ED_1
WR
_T
HRE
S
HO
LD
RD
_T
HRE
S
HO
LD