Avaya 03-300430 User Manual

Page of 2574
TONE-BD (Tone-Clock Circuit)
Issue 1 June 2005
2327
 
TONE-BD (Tone-Clock Circuit)
S8700 | 8710
 / 
S8500
S8700 | 8710
 / 
S8500
The TONE-BD MO supports PNs in a system using either a TN2312 IP Server Interface (IPSI) 
circuit pack, or for non IPSI EPNs equipped with Tone Clock circuit packs.
For IPSI-equipped EPNs, the TONE-BD MO consists of a module located on the IPSI circuit 
pack and provides tone generation, tone detection, call classification, clock generation, and 
synchronization. It replaces the TN2182B Tone-Clock board and is inserted into each PN’s 
Tone-Clock slot. For non IPSI EPNs, the TN2182B Tone-Clock circuit pack provide the previous 
functions.
The TN2312 IPSI circuit pack, for a PN equipped with IPSIs, or the Tone-Clock circuit pack, for 
a non IPSI PN, both contains two independent components:
Tone Generator that provides every tone needed by the system
Clock that generates the system clocks for both the Time Division Multiplex (TDM) bus and 
the packet (LAN) bus
It also aids in monitoring and selecting internal synchronization references.
When resolving an IPSI or Tone-Clock circuit pack’s errors/alarms, the following sections should 
also be consulted:
For non IPSI EPNs, use the set tone-clock location command to establish the 
tone and synchronization resources for the system.
For IPSI EPNs, use set ipserver-interface to establish the tone and 
synchronization resources for the system.
TONE-PT (Tone Generator)
TDM-CLK (TDM Bus Clock)
SYNC (Synchronization)
ETR-PT
PKT-INT (IPSI only)
MO Name
Alarm Level
Initial SAT Command to Run
Full Name of MO
TONE-BD
MAJ
test tone-clock location sh
Tone-Clock circuit
TONE-BD
MIN
test tone-clock location sh
Tone-Clock circuit
TONE-BD
WRN
release tone-clock location
Tone-Clock circuit