Fujitsu FR81S User Manual
CHAPTER 34: CLOCK SUPERVISOR
3. Register
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK SUPERVISOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
7
[bit5] SM (Sub clock Missing) : Sub clock stop
When this bit is "1", it indicates that any problem is found in the sub oscillation clock.
When this bit is "0", there are no problems in the sub clock.
When the sub clock is not restored, "0" write access is ignored.
This bit will be cleared to "0" on power-on or external reset. Other types of resets have no effect on this bit.
This bit will be invalid when the single clock product is set to operate in the sub clock mode (SCKS=1,
CSELR:SCEN=1).
SM
Read
Write
0
Sub oscillation clock stop undetected
When the sub clock is restored oscillating,
this bit can be cleared
1
Sub oscillation clock stop detected
No effect
[bit4] RCE (RC-oscillator Enable) : CR oscillator Enable
The oscillation of the CR oscillator is permitted at the standby mode when this bit is set to "1". The thing to
set this bit to "0" is prohibited while main clock supervisor or the sub-clock supervisor has been still
permitted.
First of all, it is necessary to confirm the MM bit and the SM bit are "0" after prohibiting the supervisor.
Afterwards, sets the RCE bit to "0".
Please do not set the RCE bit to "0" when either of the MM bit or the SM bit is "1". This bit is cleared to
"1" by turning on the power supply or external reset. Other types of resets have no effect on this bit.
This bit will be invalid when the single clock product is set to operate in the sub clock mode (SCKS=1,
CSELR:SCEN=1).
RCE
Description
0
CR oscillation disabled at STBY mode
1
CR oscillation enabled at STBY mode (Initial value)
[bit3] MSVE (Main clock SuperVisor Enable) : Main clock supervisor enable
When this bit is set to "1", the main clock supervisor is enabled.
If this bit is set to "1", the CR oscillator needs to have oscillation stabilization wait time for 20μs or more.
This bit is only initialized to "1" when the power is turned on.
Other types of resets have no effect on this bit.
MSVE
Description
0
Main clock supervisor disabled
1
Main clock supervisor enabled (Initial value)
MB91520 Series
MN705-00010-1v0-E
1180