Fujitsu FR81S User Manual

CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE

7. Operation of LIN Interface (v2.1)

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : MULTI-FUNCTION SERIAL INTERFACE

FUJITSU SEMICONDUCTOR CONFIDENTIAL

294

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When the transmission of ID Field is completed, the LIN automatic header transmission completion flag

is set (LAMSR:LAHC="1"). At this time, when the LIN automatic header transmission completion

interrupt enable bit has been enabled (LAMIER:LAHCIE="1"), the interrupt is generated.

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The transmission stops when the following errors generate.

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LIN bus error

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LIN ID parity error

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Framing error

Notes:

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The automatic header transmission stops when SCR:TXE is set to "0" after the LIN assist mode

activation.

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Please do not change the automatic header transmission setting after the LIN assist mode activation.

Figure 7-41 From LIN Break Field to ID Field Transmission

LIN bus

LIN Break

delimiter

ESCR : LBL2-0

ESCR : DEL1-0

SCR : LBR

SCR : TXE

SCR : RXE

Sync Field

LAMCR : LAMEN

LAMCR : LDL3-0

LAMCR : LIDEN

H : LIN assist mode processing enable

LIN Break length(13～20)

LIN Break delimiter length(1～4)

H : LIN ID register use enable

LIN DATA length(1～8byte)

LAMTID : LID5-0

LIN ID value setting

SMR : SBL
ESCR : ESBL

STOP bit length(1-4bit)

ST 0 1 2 3 4 5 6 7 SP ST 0 1 2 3 4 5 6 7 SP

ID Field

：Don’t care

LAMSR : LAHC

L : transmission disable

L : reception disable



LIN Break Field retransmission processing assist mode

Only when transmission prohibition setting (SCR:TXE=0) and state (SSR:TBI=1) of the transmission bus

idle, LIN Break Field can be set (SCR:TBR=1). Therefore, when other than the transmission prohibition

setting (SCR:TXE=0) or the transmission bus idle (SCR:LBR=1), the LIN Break Field setting

(SCR:LBR=1) can be set after initializing the state according to the following procedure.

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First of all, transmission prohibition setting (SCR:TXE=0) and reception prohibition setting

(SCR:RXE=0) are done.

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The transmission data before it retransmits is clear.

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When transmission FIFO is used, the transmission FIFO is reset (FCR0:FCL1=1 or FCR0:FCL2=1)

after transmission FIFO operation is prohibited (FCR0:FE1=0 or FCR0:FE2=0).

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Then, the transmission data register clear is executed (LAMCR:LTDRCL=1), and the state is made

the transmission bus idle.

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The reception data before it retransmits is clear.

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When reception FIFO is used, the reception FIFO is reset (FCR0:FCL1=1 or FCR0:FCL2=1) after

reception FIFO operation is prohibited (FCR0:FE1=0 or FCR0:FE2=0).

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Then, to clear the reception data register, the RDR register is read.

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When LIN assist mode transmission ID register (LAMTID) is used after the above-mentioned is

processed, the ID Field data is set to LAMTID (LIN assist mode transmission ID register).

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The following processing is equal to preceding clause "From LIN Break Field to ID Field

transmission".

MB91520 Series

MN705-00010-1v0-E

1607