Fujitsu FR81S User Manual
CHAPTER 3: CPU
10. Memory Protection Function (MPU)
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CHAPTER : CPU
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[bit0] IPV (Instruction fetch Protection Violation)
This bit indicates that an instruction access protection violation occurred. In order to save the details of new
protection violations, clear this bit.
IPV
Instruction access protection violation
0
Instruction access protection violation not detected (initial value)
1
Instruction access protection violation detected
Note:
This register is a prohibition of use.
MB91520 Series
MN705-00010-1v0-E
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