Fujitsu FR81S User Manual
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
16
4.2.1. CAN Control Register : CTRLR
The bit configuration of the CAN control register is shown.
Controls the operation mode of the CAN controller.
CAN Control Register (upper byte): Address Base + 00
H
(Access: Byte,
Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
CAN Control Register (lower byte): Address Base + 01
H
(Access: Byte,
Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Test
CCE
DAR
Reserved
EIE
SIE
IE
Init
Initial value
0
0
0
0
0
0
0
1
Attribute
R/W
R/W
R/W
R0,W0
R/W
R/W
R/W
R/W
[bit15 to bit8] Reserved bit
The read value is always "0". When writing to these bits, set "0".
[bit7]: Test mode enable bit
Test
Function
0
Normal operation [Initial value]
1
Test mode
Note:
Set "1" to the Test bit only when the INIT bit is "1".
[bit6]: Bit timing register write enable bit
CCE
Function
0
Disables the writing to the CAN bit timing register (BTR) and the CAN prescaler
extension register (BRPER). [Initial value]
1
Enables the writing to the CAN bit timing register (BTR) and the CAN prescaler
extension register (BRPER). This bit is valid when the Init bit is "1".
MB91520 Series
MN705-00010-1v0-E
1709