Fujitsu FR81S User Manual
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
38
4.3.6. IFx Data Registers A1, A2, B1, B2 : IFxDTA1, IFxDTA2,
IFxDTB1, IFxDTB2
The bit configuration of the IFx data registers A1, A2, B1, B2 are shown.
They are used to write/read message object transmission/reception data in message RAM. Only used for
transmitting/receiving data frames, and not for transmitting/receiving remote frames.
addr+0
addr+1
addr+2
addr+3
IFx Message Data A1 (addresses 20
H
& 50
H
)
Data(0)
Data(1)
IFx Message Data A2 (addresses 22
H
& 52
H
)
Data(2)
Data(3)
IFx Message Data B1 (addresses 24
H
& 54
H
)
Data(4)
Data(5)
IFx Message Data B2 (addresses 26
H
& 56
H
)
Data(6)
Data(7)
IFx Message Data A2 (addresses 30
H
& 60
H
)
Data(3)
Data(2)
IFx Message Data A1 (addresses 32
H
& 62
H
)
Data(1)
Data(0)
IFx Message Data B2 (addresses 34
H
& 64
H
)
Data(7)
Data(6)
IFx Message Data B1 (addresses 36
H
& 66
H
)
Data(5)
Data(4)
IFx Data Register:
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Data
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Transmission message data setting
Data set starts from MSB (bit7, bit15) and will be transmitted in the order of Data(0), Data(1), ..., Data(7).
Reception message data
Reception message data starts from MSB (bit7, bit15) and will be stored in the order of Data(0), Data(1), ...,
Data(7).
Notes:
⋅
If the reception message data is less than 8 bytes, undefined data will be written to the remaining bytes
of the data register.
⋅
Data transfer to the message object will be in units of 4 bytes of Data A or Data B. It is therefore not
possible to update only a part of the 4-byte data.
MB91520 Series
MN705-00010-1v0-E
1731