Fujitsu FR81S User Manual
CHAPTER 50: RAM DIAGNOSIS FUNCTION
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : RAM DIAGNOSIS FUNCTION
FUJITSU SEMICONDUCTOR CONFIDENTIAL
13
4.4. TEST Start Address Register XBS RAM : TASARX
This section explains the bit structure of TEST Start Address Register XBS RAM.
TEST start address register (TASARX) specifies the start address of RAM diagnosis and initialization for
XBS RAM.
•
TASARX: Address 301A
H
(Access: Byte, Half-word, Word)
15
14
13
12
11
10
9
8
BIT
Reserved
ST14
ST13
ST12
ST11
ST10
ST9
ST8
0
0
0
0
0
0
0
0
Initial values
R0, W0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attributes
7
6
5
4
3
2
1
0
BIT
ST7
ST6
ST5
ST4
ST3
ST2
ST1
ST0
0
0
0
0
0
0
0
0
Initial values
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attributes
[bit15] Reserved
Reserved bit. This bit reads out "0". At writing, write "0".
[bit14 to bit0] ST14 to ST0: RAM diagnosis start address bits
These bits are used to specify the address from which the RAM diagnosis and initialization start for XBS
RAM.
Note:
Setting of a value outside the XBS RAM area and a value that sets TASARX.ST14 to ST0 >
TAEARX.ED14 to ED0 is disabled.
Note:
The above-mentioned address is an offset of the word length.
The absolute address is calculated by adding the base address to the offset address where lower two bits
were added.
(Absolute address) = (0001_0000
H
) + (Offset address set with TASARX + 2'b00)
MB91520 Series
MN705-00010-1v0-E
2134