Fujitsu FR81S User Manual

CHAPTER 8: DMA CONTROLLER (DMAC)

5. Operation

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : DMA CONTROLLER (DMAC)

FUJITSU SEMICONDUCTOR CONFIDENTIAL

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Reloading of transfer address

The DMAC can reload the transfer address after the specified number of data transfer has completed.

•

Reloading of transfer source address

If the reloading of transfer source address has been set, the DSARn:DSA bit is returned to the initial value

after the data transfer.

If the reloading of transfer source address is disabled, the DSARn:DSA bit indicates the next access address

of the last address after the current data transfer.

If the specified number of times of transfer is suspended or abnormally terminated, the DSARn:DSA bit

indicates the next access address (after the terminated address) regardless of the reload setting of the

transfer source address.

Figure 5-7 Reloading of Transfer Source Address Register

(register write)

Transfer source

address register

Transfer source

address reload register

Reload after the transfer

Update register

•

Reloading of transfer destination address register

If the reloading of the transfer destination address has been set, the DDARn:DDA bit is returned to the

initial value after the data transfer.

If the reloading of the transfer destination address is disabled, the DDARn:DDA bit indicates the next

access address of the last address after the current data transfer.

If the specified number of times of transfer is suspended or abnormally terminated, the DDARn:DDA bit

indicates the next access address (after the terminated address) regardless of the reload setting of the

transfer destination address.

Figure 5-8 Reloading of Transfer Destination Address Register

(register write)

Transfer destination

address register

Transfer destination

address reload register

Reload after the transfer

Update register

MB91520 Series

MN705-00010-1v0-E

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