Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
320
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.4.21 CAPID
The PCI Express Capability List register enumerates the PCI Express Capability 
structure in the PCI 3.0 configuration space
14.4.22 NEXTPTR
The PCI Express Capability List register enumerates the PCI Express Capability 
structure in the PCI 3.0 configuration space
14.4.23 EXPCAP
The PCI Express Capabilities register identifies the PCI Express device type and 
associated capabilities
2:0
RO
0x0
table_bir:
Intel® Quick Data DMA BAR is at offset 10h in the DMA config space and 
hence this register is 0.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x88
Bit
Attr
Default
Description
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x90
Bit
Attr
Default
Description
7:0
RO
0x10
capability_id:
Provides the PCI Express capability ID assigned by PCI-SIG.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x91
Bit
Attr
Default
Description
7:0
RO
0xe0
next_ptr:
This field is set to the PCI PM capability.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
4Function:0-7
Offset:
0x92
Bit
Attr
Default
Description
15:14
RV
-
Reserved. 
13:9
RO
0x0
interrupt_message_number:
N/A
8:8
RO
0x0
slot_implemented:
N/A
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