Microchip Technology MA330028 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 137
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 7-5:
INTCON3: INTERRUPT CONTROL REGISTER 3
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
R/W-0
R/W-0
U-0
U-0
U-0
U-0
—
—
DAE
DOOVR
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-6
Unimplemented:
Read as ‘0’
bit 5
DAE:
DMA Address Error Soft Trap Status bit
1
= DMA address error soft trap has occurred
0
= DMA address error soft trap has not occurred
bit 4
DOOVR:
DO Stack Overflow Soft Trap Status bit
1
= DO stack overflow soft trap has occurred
0
= DO stack overflow soft trap has not occurred
bit 3-0
Unimplemented:
Read as ‘0’
REGISTER 7-6:
INTCON4: INTERRUPT CONTROL REGISTER 4
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
—
SGHT
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-1
Unimplemented:
Read as ‘0’
bit 0
SGHT:
Software Generated Hard Trap Status bit
1
= Software generated hard trap has occurred
0
= Software generated hard trap has not occurred