Freescale Semiconductor MPC5200B ユーザーズマニュアル

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Freescale Semiconductor

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Timer pins 6 and 7 are dedicated as Timer GPIO and have no alternate function.

Although the Timer as GPIO only operates to the Simple GPIO level, Interrupt capability can be achieved by configuring the Timer for Input 
Capture mode.

There is a dedicated GPIO port group that consists of 2 pins. Both pins operate at the WakeUp GPIO level. They are designated:

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GPIO_WKUP_6

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GPIO_WKUP_7

However, GPIO_WKUP_6 is not dedicated and can be programmed to operate as a second SDRAM memory chip select. As such, this pin is 
connected to the Memory Vdd supply. For Dual Data Rate memory, the GPIO_WKUP_6 pin is driven at the reduced 2.5V level.

If not used as a memory chip select, the GPIO_WKUP_6 pin serves as a memory voltage compatible GPIO.

The GPIO programmer’s model contains 3 separate register sets (or modules), each at different offsets from MBAR. These register sets are:

1.

. Output Only, Simple, and Interrupt GPIO are controlled by registers within this 

module. There are 3 register groupings for individual control of each of the named GPIO types.

2.

. WakeUp GPIO are controlled by this register set

3.

. Timer functions and Timer GPIO are controlled by this module.

All GPIO functionality is dependent on the Port Configuration Register (PCR) setting. The PCR is the first register in the GPIO Standard 
Module. This register controls the Pin MUX Logic. Therefore, the PCR also controls the physical routing of MPC5200B I/O pins to and from 
internal logic. The PCR is expected to be configured early in the boot process and set to a static value that supports the given peripheral set 
of a specific application.

The PCR is not accessible during Deep Sleep mode.

The GPIO Standard Register set has separate registers for each GPIO type.

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Simple

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Output Only

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Interrupt

These registers are at an offset of MBAR + 0x0B00. 

The GPIO Standard Register set uses 16 32-bit registers. These registers are located at an offset from MBAR of 0x0B00. Register addresses 
are relative to this offset. Therefore, the actual register address is: 

Hyperlinks to the GPIO pin type registers are provided below:

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 (0x0B00)

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 (0x0B20)

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 (0x0B04)

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 (0x0B24)

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 (0x0B08)

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(0x0B28)

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(0x0B2C)

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(0x0B10)

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(0x0B30)

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(0x0B14)

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(0x0B34)

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 (0x0B18)

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(0x0B38)

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(0x0B1C)

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 (0x0B3C)