Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2138
Datasheet
18.6.23
Best Effort Service Latency (BESL)—Offset 62h
Bset Effort Service Latency.
Access Method
Default: 00h
18.6.24
PCI Power Management Capability ID (PM_CID)—Offset 70h
Access Method
7
4
0
0
0
1
0
0
0
0
0
RSVD
FL
TV
Bit 
Range
Default & 
Access
Field Name (ID): Description
7:6
00b
RO
Reserved (RSVD): 
.
Power Well: 
SUS
5:0
20h
RW
Frame Length Timing Value (FLTV): 
SOF micro-frame length) is equal to 59488 + 
value in this field. The default value is decimal 32 (20h), which gives a SOF cycle time of 
60000. Frame Length (number of High Speed bit times) FLADJ Value (decimal) 
(decimal) 59488 0 (00h) 59504 1 (01h) 59520 2 (02h) ... 59984 31 (1Fh) 60000 32 
(20h) ... 60480 62 (3Eh) 60496 63 (3Fh) Each decimal value change to this register 
corresponds to 16 high-speed bit times. The SOF cycle time (number of SOF counter 
clock periods to generate a SOF micro-frame length) is equal to 59488 + value in this 
field. The default value is decimal 32 (20h), which gives a SOF cycle time of 60000. 
Frame Length (# High Speed bit times) FLADJ Value
Power Well: 
SUS
Type: 
PCI Configuration Register
(Size: 8 bits)
Offset: 
7
4
0
0
0
0
0
0
0
0
0
DB
E
S
LD
DBES
L
Bit 
Range
Default & 
Access
Field Name (ID): Description
7:4
0h
RW/L
Default Best Effort Service Latency Deep (DBESLD): 
Default Best Effort Service 
Latency (DBESLD) If the value of this field is non-zero, it defines the recommended 
value for programming the PORTPMSC register BESLD field. This is programmed by 
BIOS based on platform parameters.
Power Well: 
Core
3:0
0h
RW/L
Default Best Effort Service Latency (DBESL): 
If the value of this field is non-zero, it 
defines the recommended value for programming the PORTPMSC register BESL field. 
This is programmed by BIOS based on platform parameters.
Power Well: 
Core