Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  6   TIMER  ARRAY  UNIT 

R01UH0305EJ0200  Rev.2.00 

 

 

201  

Jul 04, 2013 

The TMRmn register sets an operation mode of channel n.  This register is used to select the operation clock (f

MCK

), 

select the count clock, select the master/slave, select the 16 or 8-bit timer (only for channels 1 and 3), specify the start 

trigger and capture trigger, select the valid edge of the timer input, and specify the operation mode (interval, capture, event 

counter, one-count, or capture and one-count). 

Rewriting the TMRmn register is prohibited when the register is in operation (when TEmn = 1).  However, bits 7 and 6 

(CISmn1, CISmn0) can be rewritten even while the register is operating with some functions (when TEmn = 1) (for details, 

see 6.8  Independent Channel Operation Function of Timer Array Unit and 6.9  Simultaneous Channel Operation 

Function of Timer Array Unit. 

The TMRmn register can be set by a 16-bit memory manipulation instruction. 

Reset signal generation clears this register to 0000H.