Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
57
Example: When you write "AAAA5555"h with 32 bits data length:
Number of write to
TDR
D31 D16
D15 D0
First
"Invalid"
"5555"
H
Second
"Invalid"
"AAAA"
H
When you select one of upper bits (SSR:ES=1), first write must be upper 16 bits of transmitting data and
second write must be lower 16 bits of transmitting data.
Example: When you write "AAAA5555"h with 32 bits data length:
Number of write to
TDR
D31 D16
D15 D0
First
"Invalid"
"AAAA"
H
Second
"Invalid"
"5555"
H
Notes:
⋅
Transmit data register is write-only register and receive data register is read-only register. The value
written is different from the read value since the transmit/receive registers are located at the same address.
Therefore, instructions such as INC/DEC instructions which perform read-modify-write (RMW)
operations cannot be used.
⋅
For more information about the set timing of the transmission data empty flag (SSR:
TDRE) when using the transmission FIFO, see "Interrupts When Using Transmission FIFO and Flag
Setting Timing".
MB91520 Series
MN705-00010-1v0-E
1370