Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
7. Operation of LIN Interface (v2.1)
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
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Timing of LIN break Field Detection Flag (LBD) Setting
LBD bit is set to "1" when the serial input (SIN) is "0" for more than 11-bit width. In this case when LIN break
Field interrupt is enabled (ESCR:LBIE=1), a reception interrupt occurs.
Figure 7-2 Timing of LIN Break Field Flag (LBD) Setting
Reception data(SIN)
Sampling clock
LBD
LBD clearing by CPU
LIN Break
Sampling point
…
…
After 11-bit “L” of reception data is detected with the falling edge of the sampling
clock, LIN Break is detected with the rising edge of the sampling clock. LBD is set to
“1” when LIN Break is detected.
clock, LIN Break is detected with the rising edge of the sampling clock. LBD is set to
“1” when LIN Break is detected.
MB91520 Series
MN705-00010-1v0-E
1560