Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
8. Operation of I2C
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
370
Figure 8-48 Slave Reception Interrupt (7)-when FIFO is Disabled
(SSR:DMA="1", IBCR:WSEL="0", IBSR:RSA="0")
S Slave Address W ACK Data ACK Data ACK Data NACK P or Sr
△ ■ ■ △▲
① ② ③ ② ③ ④
S: Start condition
W: Data direction bit (Write direction)
P: Stop condition
Sr: Repeated start condition
: Interrupt because of INTE = "1"
: Interrupt because of CNDE = "1"
n: Interrupt by RIE= "1"
(1) An interrupt generated by ACK output due to the match with the slave address
- ACKE = "1", INT= "0" write
(2) An interrupt generated by 1 byte reception (I
2
C bus is no wait)
- reception data is read from the reception buffer.
(3) I
2
C bus wait by ACK response
- reception data is read from the reception buffer.
(4) An interrupt generated by 1 byte reception ＋NACK response
- Reception data is read from the reception buffer.INT="0" write
Figure 8-49 Slave Reception Interrupt (8)-when FIFO is Disabled
(SSR:DMA="1", IBCR:WSEL="1", IBSR:RSA="0")
S Slave Address W ACK Data ACK Data ACK Data ACK P or Sr
△ ■ ■ ■ ▲
① ② ② ③
S: Start condition
W: Data direction bit (Write direction)
P: Stop condition
Sr: Repeated start condition
: Interrupt because of INTE = "1"
: Interrupt because of CNDE = "1"
n: Interrupt by RIE = "1"
(1) An interrupt generated by ACK output due to the match with the slave address
- ACKE="1", INT="0" write
(2) An interrupt generated by 1 byte reception
- reception data is read from the reception buffer.
(3) An interrupt generated by 1 byte reception
- After reception data is read from the reception buffer.
MB91520 Series
MN705-00010-1v0-E
1683