Fujitsu FR81S User Manual
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
41
4.4.2. Functions of Message Object
The functions of the message object are shown.
When transmitting a message, ID28 to ID0, Xtd and Dir bits will be used as the ID and type of the message.
When receiving a message, Msk28 to Msk0, MXtd and MDir bits will be used in the acceptance filter. ID,
IDE, RTR, DLC and DATA for data frame or remote frame passing through the acceptance filter will be
stored in the ID28 to ID0, Xtd, Dir, DLC3 to DLC0, Data7 to Data0 of the message objects. Xtd indicates
whether the message object is an extension frame or standard frame, a 29-bit ID (extension frame) will be
received if Xtd is "1", and an 11-bit ID (standard frame) will be received if Xtd is "0".
If the received data frame or remote frame matches one or more message objects, it will be stored to the
lowest matched message number. (See reception message acceptance filter in "5.3 Message Reception
Operation" for details.)
MsgVal: Valid message bit
MsgVal
Function
0
Message object is invalid.
Message transmission/reception will not be performed.
1
Message object is valid.
Message transmission/reception will become possible.
Notes:
⋅
Be sure to initialize the MsgVal bit of the message object before resetting the Init bit of the CAN
control register (CTRLR) to "0" and changing the value of ID28 to ID0, Xtd, Dir, and DLC3 to DLC0.
⋅
If the MsgVal bit is cleared to "0" while the transmission is in progress, the TxOk bit of the CAN
status register (STATR) will become "1" as soon as the transmission ends. However, the message
object and the TxRqst bit of the CAN transmission request register (TREQR) will not be cleared to
"0". So be sure to clear the TxRqst bit to "0" by the message interface register.
UMask: Acceptance mask enable bit
UMask
Function
0
Does not use Msk28 to Msk0, MXtd, and MDir.
1
Uses Msk28 to Msk0, MXtd, and MDir.
Notes:
⋅
Change the UMask bit while the Init bit of the CAN control register (CTRLR) is "1" or while the
MsgVal bit is "0".
⋅
When the Dir bit is "1" and the RmtEn bit is "0", it will operate differently depending on the UMask
bit setting.
⋅
If the UMask bit is "1", the TxRqst bit will be reset to "0" when the remote frame is received through
the acceptance filter. At this time, the received ID, IDE, RTR and DLC will be stored to the message
object, the NewDat bit will be set to "1", and the data will remain unchanged (treated as a data
frame).
⋅
If the UMask bit is "0", the TxRqst bit will remain unchanged by the remote frame reception; and it
will ignore the remote frame.
MB91520 Series
MN705-00010-1v0-E
1734