Fujitsu FR81S User Manual
CHAPTER 11: I/O PORTS
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : I/O PORTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
4.3. Port Function Register 00 to 19 : PFR00 to 19 (Port
Function Register 00 to 19)
The bit configuration of port function register 00 to 19 is shown below.
These registers specify whether or not the pins are used to function as ports. If a pin is to be used as a
peripheral's input pin, the corresponding bit register must be set for the port function.
PFR00 to PFR19 are key code target registers.
PFR00 to PFR19 : Address 0E20
H
, 0E21
H
,
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
P[7:0]
Initial
value
∗
∗
∗
∗
∗
∗
∗
∗
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
∗
:Initial value of the each bits can be referred “B. I/O map” in “APPENDIX”.
[bit7 to bit0] P (Port) : Port function selection bits
These bits are used to set the port function.
PFR0.P[7:0] is for external pins P007 to P000
PFR1.P[7:0] is for external pins P017 to P010
PFR2.P[7:0] is for external pins P027 to P020
(A similar process continues)
The assignment is as shown above.
P[n]
Operation
0
Port function or peripheral input pin (Initial value)
1
Peripheral I/O (bidirectional) pin, peripheral output pin or external bus
pin(set by EPFR)
PFR13.P7, PFR14.P[7:5, 1:0], PFR15.P[7:6] are reserved bits. Both writing to and reading from these bits
have no effect.
PFR13.P[6:5] are reserved bits in the dual clock products. Both writing to and reading from these bits have
no effect.
Some devices of the MB91520 series have ports missing. For details of which port is missing, see "1.16
Port function (General-Purpose I/O) Pins" in "CHAPTER:OVERVIEW". As for those bits allocated in the
missing ports, both writing and reading have no effect.
MB91520 Series
MN705-00010-1v0-E
406