Intel Xeon® Processor X3430 (8M Cache, 2.40 GHz) BX80605X3430 User Manual
Product codes
BX80605X3430
Processor Uncore Configuration Registers
270
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
4.13.11 MC_DDR_THERM_STATUS0
MC_DDR_THERM_STATUS1
This register contains the status portion of the DDR_THERM# functionality as described
in the processor datasheet (that is, what is happening or has happened with respect to
the pin).
in the processor datasheet (that is, what is happening or has happened with respect to
the pin).
§
Device:
4, 5
Function: 3
Offset:
A4h
Access as a DWord
Bit
Attr
Default
Description
31:3
RO
0
Reserved
2
RO
0
ASSERTION
An assertion edge was seen on DDR_THERM#. Write-1-to-clear.
An assertion edge was seen on DDR_THERM#. Write-1-to-clear.
1
RO
0
DEASSERTION
A deassertion edge was seen on DDR_THERM#. Write-1-to-clear.
A deassertion edge was seen on DDR_THERM#. Write-1-to-clear.
0
RO
0
STATE
Present logical state of DDR_THERM# bit. This is a static indication of the
Present logical state of DDR_THERM# bit. This is a static indication of the
pin, and may be several clocks out of date due to the delay between the pin
and the signal.
STATE = 0 means DDR_THERM# is deasserted
STATE = 1 means DDR_THERM# is asserted
STATE = 0 means DDR_THERM# is deasserted
STATE = 1 means DDR_THERM# is asserted